N. N. Chakraborty and H. Das and G. S. Rose

August, 2023

66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

https://ieeexplore.ieee.org/document/10406136

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Abstract

To create hardware platforms that are compact, power-efficient, and suitable for online learning, we develop a spike-driven synaptic plasticity (SDSP) circuit for a Hafnium-Oxide-based memristive neuromorphic core. The core includes a configurable integrate-and-fire (IAF) neuron and a current-controlled memristive synapse, with SDSP modifying synaptic weights based on pre-synaptic spikes, the post-synaptic neuron's membrane potential, and recent spiking activity. Compared to the widely used spike-timing-dependent plasticity (STDP), the SDSP model can overcome its limitations and potentially be implemented in a smaller area. Simulations using a 65nm CMOS process confirm the circuit's functionality and find that it offers reliable weight switching and good performance in terms of area and power consumption.

Citation Information

Text

author      N. N. Chakraborty and H. Das and G. S. Rose
title       Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic Core
booktitle   66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
address     Tempe, AZ
month       August
year        2023
doi         10.1109/MWSCAS57524.2023.10406136
where       https://ieeexplore.ieee.org/document/10406136

Bibtex

@INPROCEEDINGS{cdr:23:sds,
    author = "N. N. Chakraborty and H. Das and G. S. Rose",
    title = "Spike-Driven Synaptic Plasticity for a Memristive Neuromorphic Core",
    booktitle = "66th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)",
    address = "Tempe, AZ",
    month = "August",
    year = "2023",
    doi = "10.1109/MWSCAS57524.2023.10406136",
    where = "https://ieeexplore.ieee.org/document/10406136"
}