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Functional Specification of the RAVENS Neuroprocessor

Adam Z. Foshie, James S. Plank, Gullett, Garrett S. Rose and Catherine D. Schuman

July, 2023

Published on arXiv.

https://arxiv.org/abs/2307.15232

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Abstract

RAVENS is a neuroprocessor that has been developed by the TENNLab research group at the University of Tennessee. Its main focus has been as a vehicle for chip design with memristive elements; however it has also been the vehicle for all-digital CMOS development, plus it has implementations on FPGA's, microcontrollers and software simulation. The software simulation is supported by the TENNLab neuromorphic software framework so that researchers may develop RAVENS solutions for a variety of neuromorphic computing applications. This document provides a functional specification of RAVENS that should apply to all implementations of the RAVENS neuroprocessor.

Citation Information

Text


author           A. Z. Foshie and J. S. Plank and G. S. Rose and C. D. Schuman
title            Functional Specification of the RAVENS Neuroprocessor
howpublished     arXiv:2307.15232
doi              10.48550/ARXIV.2307.15232
url              https://arxiv.org/abs/2307.15232
year             2023
copyright        Creative Commons Attribution 4.0 International

Bibtex


@MISC{fpr:23:fsr,
    author = "A. Z. Foshie and J. S. Plank and G. S. Rose and C. D. Schuman",
    title = "Functional Specification of the {RAVENS} Neuroprocessor",
    howpublished = "arXiv:2307.15232",
    doi = "10.48550/ARXIV.2307.15232",
    url = "https://arxiv.org/abs/2307.15232",
    year = "2023",
    copyright = "Creative Commons Attribution 4.0 International"
}