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The Case for RISP: A Reduced Instruction Spiking Processor

James S. Plank, ChaoHui Zheng, Bryson Gullett, Nicholas Skuda, Charles Rizzo, Catherine D. Schuman and Garrett S. Rose

June, 2022

Published on arXiv.

https://arxiv.org/abs/2206.14016

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Abstract

In this paper, we introduce RISP, a reduced instruction spiking processor. While most spiking neuroprocessors are based on the brain, or notions from the brain, we present the case for a spiking processor that simplifies rather than complicates. As such, it features discrete integration cycles, configurable leak, and little else. We present the computing model of RISP and highlight the benefits of its simplicity. We demonstrate how it aids in developing hand built neural networks for simple computational tasks, detail how it may be employed to simplify neural networks built with more complicated machine learning techniques, and demonstrate how it performs similarly to other spiking neurprocessors.

Citation Information

Text


title           The Case for RISP: A Reduced Instruction Spiking Processor
author          J. S. Plank and C. Zheng and B. Gullett and N. Skuda 
                and C. Rizzo and C. D. Schuman and G. S. Rose
howpublished    arXiv:2206.14016
url             https://arxiv.org/abs/2206.14016
eprint          2206.14016 
year            2022

Bibtex


@MISC{pzg:22:risp,
    title = "The Case for {RISP}: A Reduced Instruction Spiking Processor",
    author = "J. S. Plank and C. Zheng and B. Gullett and N. Skuda 
                and C. Rizzo and C. D. Schuman and G. S. Rose",
    howpublished = "arXiv:2206.14016",
    url = "https://arxiv.org/abs/2206.14016",
    eprint = "2206.14016 ",
    year = "2022"
}