Sagarvarma Sayyaparaju, Gangotree Chakma, Sherif Amer and Garrett S. Rose

May, 2017

27th ACM Great Lakes Symposium on VLSI

http://dl.acm.org/citation.cfm?id=3060418

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Abstract

Memristors are widely leveraged in neuromorphic systems for constructing synapses. Resistance switching characteristics of memristors enable online learning in synapses. This paper addresses a fundamental issue associated with the design of synapses with memristors whose switching rates in either direction differ up to two orders of magnitude. A twin-memristor synapse that uses memristors with identical switching rates is first presented. It is shown this design fails in the case of disproportionate switching times. To circumvent this issue, a quad-memristor synapse is also considered. The scheme used for online learning of the synapse circuit implementation, and simulation results are also presented. To compare the two synapses, their area, clock frequency, dynamic power and energy per spike values are provided.

Citation Information

Text

author       S. Sayyaparaju and G. Chakma and S. Amer and G. S. Rose
title        Circuit Techniques for Online Learning of Memristive Synapses in CMOS-Memristor Neuromorphic Systems
booktitle    27th ACM Great Lakes Symposium on VLSI
month        May
year         2017
address      Banff, Alberta, Canada
pages        479-482
publisher    ACM
doi          10.1145/3060403.3060418

Bibtex

@INPROCEEDINGS{sca:17:sto,
    author = "S. Sayyaparaju and G. Chakma and S. Amer and G. S. Rose",
    title = "Circuit Techniques for Online Learning of Memristive Synapses in 
                {CMOS}-Memristor Neuromorphic Systems",
    booktitle = "27th ACM Great Lakes Symposium on VLSI",
    month = "May",
    year = "2017",
    address = "Banff, Alberta, Canada",
    pages = "479-482",
    publisher = "ACM",
    doi = "10.1145/3060403.3060418"
}